Using Commercial FPGAs for Prototyping GALS Circuits

سال انتشار: 1384
نوع سند: مقاله کنفرانسی
زبان: انگلیسی
مشاهده: 1,704

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شناسه ملی سند علمی:

ICEE13_221

تاریخ نمایه سازی: 27 آبان 1386

چکیده مقاله:

This paper introduces a methodology for prototyping Globally Asynchronous Locally Synchronous (GALS) circuits on synchronous commercial FPGAs. A library of required elements for implementing GALS circuits is proposed and general design considerations to successfully implement a GALS circuit on FPGA are discussed. The library includes clock generators and arbiters, and different port controllers. Different mplementations of these circuits and their advantages and disadvantages are explored. At the end we present a GALS Reed-Solomon decoder as a practical example. The results show that the GALS approach improves the performance of the circuit by 11% and reduces the power consumption by 18.7% to 19.6% considering different error rates. On the other hand, the area of the circuit is increased by 51% which is acceptable considering that a pure synchronous circuit including a central controller is decomposed to generate GALS system and 29% of this overhead belongs to distributing controller in different modules. Deploying better decomposition methods can reduce this overhead substantially.

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نویسندگان

Mehrdad Najibi

Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic) ۴۲۴ Hafez Ave, Tehran ۱۵۷۸۵, Iran

Kamran Saleh

Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic) ۴۲۴ Hafez Ave, Tehran ۱۵۷۸۵, Iran

Mohsen Naderi

Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic) ۴۲۴ Hafez Ave, Tehran ۱۵۷۸۵, Iran

Hossein Pedram

Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic) ۴۲۴ Hafez Ave, Tehran ۱۵۷۸۵, Iran

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