Input Matching Techniques for CMOS Cascode LNA for Millimeter Wave Applications

Optimization of a cascode LNA in modern CMOS technologies is based on the minimization of the noise factor, meanwhile preserving the optimum power matching in the input. The conventional analytic method for this optimization is based on a simple calculation of the LNA input impedance and conjugate matching. In this method the gate-drain capacitance is neglected. However this approximation causes considerable errors in millimeter wave frequencies, in modern CMOS technologies in which gate-drain capacitance is comparable with the gate-source capacitance. In this work we propose two new input matching methods, considering an accurate transistor model. These methods have good accuracy to be used as a design guideline in millimeter wave band. To validate the analysis results we have used the foundry design kit for the STMicrelectroics 90nm digital CMOS process.