New Schmitt Trigger Circuit for Short Channel Technologies

This paper proposed a new CMOS Schmitt trigger (ST) consisted of small channel length CMOS transistors, which decreases delay and power consumption. However other suggested circuits for the same aims with new topology, suffer from variations in the lower switching voltage of Schmitt trigger, denoted by VIL. These variations are related to the channel length of CMOS transistors, L. These changes in VIL lead to a narrower hysteresis and less static noise margin (SNM). The simulation results of the proposed Schmitt trigger in a short channel technology, i.e. 22nm show improvement in delay time and power consumption over the conventional Schmitt trigger. The proposed circuit also removes aforementioned changes in VIL and makes VIL unvarying to L.