A 41MHz 63dB and 1.22mW Variable Gain Amplifier in 0.18μm CMOS

in this paper a new reliable technique to design a high linear, low sensitive, wideband DC gain range and low power variable gain amplifier is presented. Therefore, by applying the proposed idea on the folded cascode amplifier, it is possible to achieve a 63dB DC gain, 41MHz (-3dB) bandwidth, accompanied with high linearity and low sensitivity as well. Also, the power consumption and unity gain bandwidth of the proposed VGA are just 1.22mW with the power supply of 1.8 volts and 4.87GHz respectively, and 1pF capacitor load is applied at the output nodes of the amplifier. Moreover, the proposedstructure is simulated in all process corners and different temperatures in the region of -45 to +85 ºC. Simulations are performed for all corner conditions by HSPICE using the BSIM3 model of the 0.18μm CMOS technology and MATLAB software