A New Mehtod To Implement High Speed Fir Filter For ECG

The purpose of this article implement FIR filter with new methods that its high speed for remove the 50/60 Hz frequency Noise that happens in the ECG. Notch Filter Band sketch with Vhdl code and implemented by software company of Altera and DSP Builder on Fpga and simulation in MATLAB Simulink. Design fir filter with MAC method caused increase speed to 20 MHz and this method used two ROM for generate coefficient, In proposed design for increase speed used of one multiplier,adder and pipelining filter. This design hardware decrease.because of coefficient is 403, filter have a best operand and accurate, Consequently noises ECG will be removed.